Hybrid molecular solid state memories & electronic nanodevices based on Polyoxometalates & other molecules of reversible redox activity - Balliou, Angeliki Maria (Εθνικό Μετσόβιο Πολυτεχνείο. Σχολή Χημικών Μηχανικών. Τομέας Χημικών Επιστημών, 2016)
According to ITRS 2.0 2015, memory technologies will continue to drive pitch scaling and highest transistor count. As DRAM products are expected to reach their scaling limits by 2024, and unless some major breakthrough occurs, flash memory is expected to lead the semiconductor industry towards the next revolution in transistor density. Inspired from this fact, this work focuses on molecular flash memories and logic switching molecular networks which, among all emerging technology candidates, are considered particularly promising due to their ability for reduction of size per cell and solution processing (low cost, injection-printing friendly), conceptual compatibility with photonic addressing due to molecular photosensitivity, multilevel storage, high information density, quick write-read operations, low power consumption, mechanical flexibility, bottom-up fabrication logic (overcoming the lithographic patterning constrains), conceptual non-binary data representation and properties’ tunability through chemical tailoring. Molecular electronic devices are fabricated via a combination of bottom-up layer-by-layer nanofabrication and self-assembly with CMOS platform lithography in order to provide a low cost large-scale route towards extension of the functional value of Si-based platforms. Tungsten Polyoxometalates (POM, [PW12O40]3- of the Keggin class are being self-arranged both on nanocrystal and hyperstructure level in a rational way resulting in layers of tunable spatial correlation length. The hyperstructures exhibit tunable valence and conduction bands and, hence, adjustable electronic properties directly related to the extent of crystallization of their building blocks. Dimensional crossover-driven insulator-to-semimetal transitions can be enforced in these hyperstructures via tuning the extent of crystallization in solution. Being able to transport or confine charge at will, these hyperstructures constitute ideal candidates for alternative molecule-based solution-printed circuitry components and transistor channels. Hybrid CMOS/molecular memory devices based on the parallel plate architecture are fabricated, characterized and tested. Each memory element contains a planar hyperstructure of molecules (typically several millions) that can store charge having multiple times the charge density of a typical DRAM capacitor. Transition-metal-oxide hybrids composed of high surface-to-volume ratio Ta2O5 matrices and tungsten POMs are investigated as a charge storage composite in molecular nonvolatile capacitive memory cells. Enhanced internal scattering of carriers results in a memory window of 4.0 V for the write state and a retention time around 10 4 s without blocking medium. Differential distance of molecular trapping centres from the cells gate and electronic coupling to the space charge region of the underlying Si substrate are being identified as critical parameters for enhanced electron trapping for the first time in such devices. The incorporation of a molecular-friendly blocking oxide that facilitates long term retention while suppressing cross-talking, is performed through realization of a multi-functional oxide stack (SiO 2 /hybrid Ta2O5-POM transition metal oxide/Al 2 O 3 ) that takes parallel advantage of photonically-addressed phononic modes to boost information storage and reach molecular states that were previously non-available. A 37 % information density increase is attained via phononic pumping, while the memory window reaches 7.0 V, corresponding to ∼ 4 × 10^14 cm^-2 charging nodes able to carry 65-195 μCb/cm^2 . Ability of multi-state addressing and write speed of 10 ns are being documented for the packed cell. The fabricated high performance non-volatile memories are the first documented CMOS-compatible long term (10 years criterion satisfaction) retention molecular capacitive cell of its kind. Following a different approach, brain-inspired, neural systems performing in networks and data-centric non-Von Neumann processing are among the latest trends for non-conventional approaches in the semiconductor industry. We focus on hybrid molecular-nanoparticle networks that exploit the massive parallelism of designless interconnected networks of locally active components, obviating the need for expensive lithographic steps. Molecular multi-junction networks comprising of gold nanoparticles (AuNPs) of diam.∼1.4 nm, electronically linked by means of copper 3-diethylamino-1-propylsulphonamide sulfonic acid substituted phthalocyanine (CuPcSu) molecules are fabricated and studied. When electrons flow through the non-linked nanoparticle arrays, they experience on-site Coulomb repulsion and are strongly localized, with localization length (ξ=0.7 nm). Under dynamic excitation the system undergoes Coulomb oscillations, while the introduction of CuPcSu molecules results in the formation of a network of multiple molecular/Au nanojunctions and conductance increases by 5 orders of magnitude. This switching behaviour functions on reversible red-ox reactions and pushes carriers in a weak localization state. In this state electrons spread over several junctions and all temperature scaled current vs voltage curves, J/T^(1+α) vs eV/kT, collapse in one universal curve, characterizing the network and the extent of its disorder. On the other hand, the strongly non-linear I-V response and negative differential resistance of drop-cast nanojunction 3-d arrays makes them suitable platforms for logic function exhibition. Common miniaturization bottlenecks such as capacitive crosstalk, are embraced as exploitable physical processes, that can lead to robust computational functionality. The networks can be configured on-flight with pulses as quick as 10 ns to modify their resistance between two discrete levels. Both levels can be addressed real time utilizing patterned nano-electrode pairs and reading voltage of the order of 500 mV. The networks are able to perform as a two-input “then-if” logic gates.