Μελέτη επιπτώσεων συνδρομολόγησηςεφαρμογών σε πολυπύρηνες αρχιτεκτονικές - Κορακίτης, Ορέστης (Εθνικό Μετσόβιο Πολυτεχνείο. Σχολή Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών. Τομέας Τεχνολογίας Πληροφορικής και Υπολογιστών. Εργαστήριο Υπολογιστικών Συστημάτων, 2014)
Modern processor architectures have moved towards utilizing multiple cores on the same physical package, which share resources of the memory hierarchy, e.g. last-level cache, memory bus bandwidth. As a result, concurrent execution of programs that make significant use of shared memory subsystems, on cores of the same package, leads to performance degradation phenomena for co-executed applications. The objective of this thesis was to study contention effects in shared memory resources, as a result of co-execution, and its impact on applications’ performance. A memory benchmark program was developed, which can measure bandwidth in all levels of the memory hierarchy. This benchmark was used to create a set of instances with different behavior and memory usage intensity, in order to emulate a variety of memory-bound applications that utilize different memory hierarchy subsystems. Co-scheduling scenarios with all combinations of the aforementioned suite were tested on two architectures, with different characteristics. This also enabled us to observe how specific architecture features and design differences may further affect applications’ interference. Performance metrics were used for all experiments in order to detect impact on execution time, as well as alterations on their general behavior. Results of the experiments can be used to validate contention estimations based on application classification models of literature-suggested contention-aware co-scheduling approaches. Additionally, the proposed benchmark program can be further used and expanded as an alternative choice for both memory performance evaluation and emulation of various memory-intensive workloads for experiments.